The present invention is related to bit masks. More particularly, the present invention is directed to an apparatus and method for masking bits held in a configuration register in a single operation through the use of a masking circuit.
The masking of bits in the registers, particularly configuration registers, of computer systems is necessary in a wide variety of applications. If the entire configuration register needs to be updated, it can be accomplished by a simple write operation. However, during normal operation, it is often necessary to update less than the entire configuration register.
In this case a series of steps must be performed. First, a lock operation must be performed to prevent reading of the configuration register while the data are being masked. Second, the data are read out of the configuration register. Third, the data are masked. Fourth, the new data are written back into the configuration register. And finally, the configuration register is unlocked.
This series of steps requires manipulation of the data in the configuration register which results in a delay in the system before the configuration register can be accessed. To minimize system delay and increase performance results it is desirable to provide a more efficient masking technique when less than the entire configuration register must be updated.